mirror of
https://github.com/mofeng-git/One-KVM.git
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276 lines
8.6 KiB
C++
276 lines
8.6 KiB
C++
//
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// Notice Regarding Standards. AMD does not provide a license or sublicense to
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// any Intellectual Property Rights relating to any standards, including but not
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// limited to any audio and/or video codec technologies such as MPEG-2, MPEG-4;
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// AVC/H.264; HEVC/H.265; AAC decode/FFMPEG; AAC encode/FFMPEG; VC-1; and MP3
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// (collectively, the "Media Technologies"). For clarity, you will pay any
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// royalties due for such third party technologies, which may include the Media
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// Technologies that are owed as a result of AMD providing the Software to you.
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//
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// MIT license
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//
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// Copyright (c) 2019 Advanced Micro Devices, Inc. All rights reserved.
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//
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// Permission is hereby granted, free of charge, to any person obtaining a copy
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// of this software and associated documentation files (the "Software"), to deal
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// in the Software without restriction, including without limitation the rights
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// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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// copies of the Software, and to permit persons to whom the Software is
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// furnished to do so, subject to the following conditions:
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//
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// The above copyright notice and this permission notice shall be included in
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// all copies or substantial portions of the Software.
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//
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// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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// THE SOFTWARE.
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//
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#include <iostream>
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#include <vector>
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#include <bitset>
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#include <array>
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#include <string>
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#include <cstring>
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#if defined(_WIN32)
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#include <intrin.h>
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#else
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#include <stdint.h>
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#endif
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class InstructionSet
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{
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// forward declarations
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class InstructionSet_Internal;
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public:
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// getters
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static std::string Vendor(void) { return CPU_Rep.vendor_; }
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static std::string Brand(void) { return CPU_Rep.brand_; }
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static bool SSE3(void) { return CPU_Rep.f_1_ECX_[0]; }
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static bool PCLMULQDQ(void) { return CPU_Rep.f_1_ECX_[1]; }
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static bool MONITOR(void) { return CPU_Rep.f_1_ECX_[3]; }
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static bool SSSE3(void) { return CPU_Rep.f_1_ECX_[9]; }
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static bool FMA(void) { return CPU_Rep.f_1_ECX_[12]; }
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static bool CMPXCHG16B(void) { return CPU_Rep.f_1_ECX_[13]; }
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static bool SSE41(void) { return CPU_Rep.f_1_ECX_[19]; }
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static bool SSE42(void) { return CPU_Rep.f_1_ECX_[20]; }
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static bool MOVBE(void) { return CPU_Rep.f_1_ECX_[22]; }
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static bool POPCNT(void) { return CPU_Rep.f_1_ECX_[23]; }
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static bool AES(void) { return CPU_Rep.f_1_ECX_[25]; }
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static bool XSAVE(void) { return CPU_Rep.f_1_ECX_[26]; }
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static bool OSXSAVE(void) { return CPU_Rep.f_1_ECX_[27]; }
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static bool AVX(void) { return CPU_Rep.f_1_ECX_[28]; }
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static bool F16C(void) { return CPU_Rep.f_1_ECX_[29]; }
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static bool RDRAND(void) { return CPU_Rep.f_1_ECX_[30]; }
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static bool MSR(void) { return CPU_Rep.f_1_EDX_[5]; }
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static bool CX8(void) { return CPU_Rep.f_1_EDX_[8]; }
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static bool SEP(void) { return CPU_Rep.f_1_EDX_[11]; }
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static bool CMOV(void) { return CPU_Rep.f_1_EDX_[15]; }
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static bool CLFSH(void) { return CPU_Rep.f_1_EDX_[19]; }
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static bool MMX(void) { return CPU_Rep.f_1_EDX_[23]; }
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static bool FXSR(void) { return CPU_Rep.f_1_EDX_[24]; }
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static bool SSE(void) { return CPU_Rep.f_1_EDX_[25]; }
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static bool SSE2(void) { return CPU_Rep.f_1_EDX_[26]; }
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static bool FSGSBASE(void) { return CPU_Rep.f_7_EBX_[0]; }
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static bool BMI1(void) { return CPU_Rep.f_7_EBX_[3]; }
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static bool HLE(void) { return CPU_Rep.isIntel_ && CPU_Rep.f_7_EBX_[4]; }
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static bool AVX2(void) { return CPU_Rep.f_7_EBX_[5]; }
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static bool BMI2(void) { return CPU_Rep.f_7_EBX_[8]; }
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static bool ERMS(void) { return CPU_Rep.f_7_EBX_[9]; }
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static bool INVPCID(void) { return CPU_Rep.f_7_EBX_[10]; }
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static bool RTM(void) { return CPU_Rep.isIntel_ && CPU_Rep.f_7_EBX_[11]; }
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static bool AVX512F(void) { return CPU_Rep.f_7_EBX_[16]; }
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static bool RDSEED(void) { return CPU_Rep.f_7_EBX_[18]; }
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static bool ADX(void) { return CPU_Rep.f_7_EBX_[19]; }
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static bool AVX512PF(void) { return CPU_Rep.f_7_EBX_[26]; }
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static bool AVX512ER(void) { return CPU_Rep.f_7_EBX_[27]; }
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static bool AVX512CD(void) { return CPU_Rep.f_7_EBX_[28]; }
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static bool SHA(void) { return CPU_Rep.f_7_EBX_[29]; }
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static bool AVX512BW(void) { return CPU_Rep.f_7_EBX_[30]; }
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static bool AVX512VL(void) { return CPU_Rep.f_7_EBX_[31]; }
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static bool PREFETCHWT1(void) { return CPU_Rep.f_7_ECX_[0]; }
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static bool LAHF(void) { return CPU_Rep.f_81_ECX_[0]; }
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static bool LZCNT(void) { return CPU_Rep.isIntel_ && CPU_Rep.f_81_ECX_[5]; }
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static bool ABM(void) { return CPU_Rep.isAMD_ && CPU_Rep.f_81_ECX_[5]; }
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static bool SSE4a(void) { return CPU_Rep.isAMD_ && CPU_Rep.f_81_ECX_[6]; }
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static bool XOP(void) { return CPU_Rep.isAMD_ && CPU_Rep.f_81_ECX_[11]; }
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static bool TBM(void) { return CPU_Rep.isAMD_ && CPU_Rep.f_81_ECX_[21]; }
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static bool SYSCALL(void) { return CPU_Rep.isIntel_ && CPU_Rep.f_81_EDX_[11]; }
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static bool MMXEXT(void) { return CPU_Rep.isAMD_ && CPU_Rep.f_81_EDX_[22]; }
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static bool RDTSCP(void) { return CPU_Rep.isIntel_ && CPU_Rep.f_81_EDX_[27]; }
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static bool _3DNOWEXT(void) { return CPU_Rep.isAMD_ && CPU_Rep.f_81_EDX_[30]; }
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static bool _3DNOW(void) { return CPU_Rep.isAMD_ && CPU_Rep.f_81_EDX_[31]; }
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private:
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static const InstructionSet_Internal CPU_Rep;
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class InstructionSet_Internal
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{
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protected:
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void GetCpuID
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(
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int32_t registers[4], //out
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int32_t functionID,
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int32_t subfunctionID = 0
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)
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{
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#ifdef _WIN32
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if(!subfunctionID)
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{
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__cpuid((int *)registers, (int)functionID);
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}
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else
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{
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__cpuidex((int *)registers, (int)functionID, subfunctionID);
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}
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#else
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asm volatile
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(
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"cpuid":
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"=a" (registers[0]),
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"=b" (registers[1]),
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"=c" (registers[2]),
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"=d" (registers[3]):
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"a" (functionID),
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"c" (subfunctionID)
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);
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#endif
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}
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public:
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InstructionSet_Internal()
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: nIds_( 0 ),
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nExIds_( 0 ),
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isIntel_( false ),
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isAMD_( false ),
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f_1_ECX_( 0 ),
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f_1_EDX_( 0 ),
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f_7_EBX_( 0 ),
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f_7_ECX_( 0 ),
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f_81_ECX_( 0 ),
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f_81_EDX_( 0 )
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{
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//int cpuInfo[4] = {-1};
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std::array<int, 4> cpui;
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// Calling __cpuid with 0x0 as the function_id argument
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// gets the number of the highest valid function ID.
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//todo: verify
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//__cpuid(cpui.data(), 0);
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GetCpuID(cpui.data(), 0);
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nIds_ = cpui[0];
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for (int i = 0; i <= nIds_; ++i)
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{
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//todo: verify
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//__cpuidex(cpui.data(), i, 0);
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GetCpuID(cpui.data(), i, 0);
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data_.push_back(cpui);
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}
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// Capture vendor string
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char vendor[0x20];
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std::memset(vendor, 0, sizeof(vendor));
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*reinterpret_cast<int*>(vendor) = data_[0][1];
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*reinterpret_cast<int*>(vendor + 4) = data_[0][3];
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*reinterpret_cast<int*>(vendor + 8) = data_[0][2];
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vendor_ = vendor;
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if (vendor_ == "GenuineIntel")
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{
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isIntel_ = true;
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}
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else if (vendor_ == "AuthenticAMD")
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{
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isAMD_ = true;
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}
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// load bitset with flags for function 0x00000001
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if (nIds_ >= 1)
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{
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f_1_ECX_ = data_[1][2];
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f_1_EDX_ = data_[1][3];
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}
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// load bitset with flags for function 0x00000007
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if (nIds_ >= 7)
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{
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f_7_EBX_ = data_[7][1];
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f_7_ECX_ = data_[7][2];
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}
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// Calling __cpuid with 0x80000000 as the function_id argument
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// gets the number of the highest valid extended ID.
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//todo: verify
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//__cpuid(cpui.data(), 0x80000000);
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GetCpuID(cpui.data(), 0x80000000);
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nExIds_ = cpui[0];
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char brand[0x40];
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memset(brand, 0, sizeof(brand));
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for (int i = 0x80000000; i <= nExIds_; ++i)
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{
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//todo: verify
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//__cpuidex(cpui.data(), i, 0);
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GetCpuID(cpui.data(), i, 0);
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extdata_.push_back(cpui);
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}
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// load bitset with flags for function 0x80000001
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if (nExIds_ >= 0x80000001)
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{
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f_81_ECX_ = extdata_[1][2];
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f_81_EDX_ = extdata_[1][3];
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}
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// Interpret CPU brand string if reported
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if (nExIds_ >= 0x80000004)
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{
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memcpy(brand, extdata_[2].data(), sizeof(cpui));
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memcpy(brand + 16, extdata_[3].data(), sizeof(cpui));
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memcpy(brand + 32, extdata_[4].data(), sizeof(cpui));
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brand_ = brand;
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}
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};
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virtual ~InstructionSet_Internal()
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{
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int i = 0;
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++i;
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}
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int nIds_;
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int nExIds_;
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std::string vendor_;
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std::string brand_;
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bool isIntel_;
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bool isAMD_;
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std::bitset<32> f_1_ECX_;
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std::bitset<32> f_1_EDX_;
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std::bitset<32> f_7_EBX_;
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std::bitset<32> f_7_ECX_;
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std::bitset<32> f_81_ECX_;
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std::bitset<32> f_81_EDX_;
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std::vector<std::array<int, 4>> data_;
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std::vector<std::array<int, 4>> extdata_;
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};
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};
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