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https://github.com/mofeng-git/One-KVM.git
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pico hid: refactoring
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121
hid/pico/src/ph_com_spi.c
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121
hid/pico/src/ph_com_spi.c
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/*****************************************************************************
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# #
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# KVMD - The main PiKVM daemon. #
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# #
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# Copyright (C) 2018-2023 Maxim Devaev <mdevaev@gmail.com> #
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# #
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# This program is free software: you can redistribute it and/or modify #
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# it under the terms of the GNU General Public License as published by #
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# the Free Software Foundation, either version 3 of the License, or #
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# (at your option) any later version. #
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# #
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# This program is distributed in the hope that it will be useful, #
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# but WITHOUT ANY WARRANTY; without even the implied warranty of #
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the #
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# GNU General Public License for more details. #
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# #
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# You should have received a copy of the GNU General Public License #
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# along with this program. If not, see <https://www.gnu.org/licenses/>. #
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# #
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*****************************************************************************/
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#include "ph_com_spi.h"
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#include "hardware/gpio.h"
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#include "hardware/irq.h"
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#include "hardware/spi.h"
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#include "hardware/regs/spi.h"
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#include "ph_types.h"
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#define _BUS spi0
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#define _IRQ SPI0_IRQ
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#define _FREQ (2 * 1000 * 1000)
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#define _CS_PIN 21
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#define _RX_PIN 20
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#define _TX_PIN 19
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#define _CLK_PIN 18
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static volatile u8 _in_buf[8] = {0};
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static volatile u8 _in_index = 0;
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static volatile u8 _out_buf[8] = {0};
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static volatile u8 _out_index = 0;
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static void (*_data_cb)(const u8 *) = NULL;
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static void _xfer_isr(void);
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void ph_com_spi_init(void (*data_cb)(const u8 *), void (*timeout_cb)(void)) {
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_data_cb = data_cb;
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(void)timeout_cb;
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spi_init(_BUS, _FREQ);
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spi_set_slave(_BUS, true);
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spi_set_format(_BUS, 8, SPI_CPOL_0, SPI_CPHA_0, SPI_MSB_FIRST);
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gpio_set_function(_CS_PIN, GPIO_FUNC_SPI);
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gpio_set_function(_RX_PIN, GPIO_FUNC_SPI);
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gpio_set_function(_TX_PIN, GPIO_FUNC_SPI);
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gpio_set_function(_CLK_PIN, GPIO_FUNC_SPI);
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// https://github.com/raspberrypi/pico-sdk/blob/master/src/rp2040/hardware_regs/include/hardware/regs/spi.h
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irq_set_exclusive_handler(_IRQ, _xfer_isr);
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spi_get_hw(_BUS)->imsc = SPI_SSPIMSC_RXIM_BITS | SPI_SSPIMSC_TXIM_BITS;
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irq_set_enabled(_IRQ, true);
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}
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void ph_com_spi_task(void) {
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if (!_out_buf[0] && _in_index == 8) {
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_data_cb((const u8 *)_in_buf);
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}
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}
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void ph_com_spi_write(const u8 *data) {
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// Меджик в нулевом байте разрешает начать ответ
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for (s8 i = 7; i >= 0; --i) {
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_out_buf[i] = data[i];
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}
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}
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void __isr __not_in_flash_func(_xfer_isr)(void) {
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# define SR (spi_get_hw(_BUS)->sr)
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# define DR (spi_get_hw(_BUS)->dr)
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while (SR & SPI_SSPSR_TNF_BITS) {
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if (_out_buf[0] && _out_index < 8) {
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DR = (u32)_out_buf[_out_index];
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++_out_index;
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if (_out_index == 8) {
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_out_index = 0;
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_in_index = 0;
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_out_buf[0] = 0;
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}
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} else {
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DR = (u32)0;
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}
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}
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while (SR & SPI_SSPSR_RNE_BITS) {
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static bool receiving = false;
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const u8 in = DR;
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if (!receiving && in != 0) {
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receiving = true;
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}
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if (receiving && _in_index < 8) {
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_in_buf[_in_index] = in;
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++_in_index;
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}
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if (_in_index == 8) {
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receiving = false;
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}
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}
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# undef DR
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# undef SR
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}
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